![]() The include information about the CPU in use in brackets and could be Due or Simulator. The following system parameters will be displayed:,. Identification query for the UNIQUE identification of the PSU. The PSU returns a decimal value which corresponds to the binary-weighted sum of all bits in the register. Reading the Standard Event Status Event register clears it. Standard Event Status Register (see Section 3.2) Query. Read value of the Standard Event Status Enable register: To enable bit 2 (decimal value = 4), bit 3 (decimal value = 8), and bit 7 (decimal value = 128), the corresponding decimal value would be 140 (4 + 8 + 128): The query reads the enable register and returns a decimal value which corresponds to the binary-weighted sum of all bits set in the register. All of the enabled events of the Standard Event Status Event Register are logically ORed sets the Event Summary Bit (ESB) of the Status Byte Register.Ī STATus:PRESet command does not clear the bits in the Status Byte register.Ġ – 255 (A decimal value which corresponds to the binary-weighted sum of the bits in the register. A 1 in the bit position enables the corresponding event. Those settings determine which events of the Standard Event Status Event register (see *ESR?) are allowed to set the ESB (Event Summary Bit) of the Status Byte register. This command sets the Standard Event Status Enable register bits in the PSU. If *CLS immediately follows a program message terminator (), then the output queue and the MAV bit are also cleared. The corresponding condition and enable registers are unaffected. This command clears all status data structures in the PSU: Waits until all pending commands are completedĬlear Status Command. ![]() Stores the current PSU state in the specified storage locationĮnables bits in the Status Byte enable register. ![]() ![]() Recalls the PSU state stored in the specified storage location Operation Complete Command used for program synchronization Returns the UNIQUE identification of the PSU Programs the Standard Event Status Enable register bits This section summarizes the mandatory subset of IEEE 488.2 commands required for any SCPI compliant instrument. ![]()
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